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16-bit 1 msps pulsar tm unipolar adc with reference ad7653 features thro ughput: 1 msps (warp mode) 800 ksps (normal mode) 666 ksps (impulse mode) 16-bit resolution analog input voltage range: 0 v to 2.5 v n o pipeline delay parallel and serial 5 v/3 v interface spi ? /qspi tm /microwire tm /dsp compatible single 5 v supply operation power dissipation 92 mw typ @ 666 ksps, 138 w @ 1 ksps without ref 128 mw typ @ 1 msps with ref 48-lead lqfp and 48-lead lfcsp packages pin-to-pin compatible with pulsar adcs applications data acquisition instrumentation digital signal processing spectrum analysis medical instruments battery-powered systems process control general description th e ad7653* is a 16-b i t, 1 ms ps, c h a r g e r e dis t r i b u tio n sar a n alog-t o-dig i t a l co n v er t e r t h a t o p era t es f r o m a sin g le 5 v p o we r su p p ly . the p a r t c o n t ains a hig h sp e e d 1 6 - b i t s a m p l i ng ad c, in t e r n al co n v ersio n c l o c k, in t e r n al r e f e r e n c e , er r o r c o rr ecti o n c i r c u i t s , a n d bo th se ri al a n d pa r a ll e l s y s t e m i n t e rf a c e p o r t s. i t f e a t ur es a v e r y hig h s a m p lin g ra t e m o de (w a r p), a fas t m o de (n o r mal) f o r asyn c h r o n o us co n v ersio n ra t e a p p l ica t io n s , a n d a r e d u ce d p o w e r m o de (i m p u l s e ) fo r lo w p o w e r a p plica- tio n s wh er e p o w e r is s c aled wi th th e thr o ug h p u t . th e ad7653 is fa b r ica t ed usin g analog devices hig h p e r f o r ma n c e , 0.6 micr o n cmos p r o c es s, wi t h co r r es p o n d in g l y lo w cos t . i t is a v a i la b l e in a 48-le ad lqfp a n d a t i n y 48-le ad lfcs p wi t h o p era t io n s p ecif ied f r o m C40c t o +85c. * p a te nt p e nd ing. functional block diagram 02966-0-001 switched cap dac 16 control logic and calibration circuitry clock ad7653 data[15:0] busy rd cs ser/par ob/ 2c ognd ovdd dgnd dvdd avdd agnd ref refgnd in ingnd pd reset serial port parallel interface cnvst warp impulse ref refbufin pdbuf pdref byteswap fi g u r e 1 . table 1. pulsar selection t y p e / k s p s 1 0 0 C 2 5 0 5 0 0 C 5 7 0 800C 1000 pseudo- differential ad7651 ad7660 / ad7661 ad7650 / ad7652 ad7664 / ad7666 ad7653 ad7667 true bipolar ad7663 ad7665 ad7671 true differential ad7675 ad7676 ad7677 18-bit ad7678 ad7679 ad7674 multichannel/ simultaneous ad7654 ad7655 product highlights 1. fa s t t h r o u g hput . th e ad7653 is a 1 ms ps, c h a r g e r e dis t r i b u tio n , 16-b i t sar a d c w i th i n t e rn al e r r o r co rr ecti o n ci r c ui tr y . 2. int e r n a l r e f e r e n c e . th e ad7653 has a n in t e r n al r e f e r e n c e wi th a typ i cal t e m p era t ur e dr if t o f 7 p p m /c. 3. s i ng l e - supp l y o p e r a t i o n . th e ad7653 o p era t es f r o m a sin g le 5 v s u p p l y . i n i m p u ls e m o de, i t s p o w e r dissi p a t io n de cr e a s e s wi t h t h e t h r o ug h p u t . 4. se ri al o r p a r a ll e l i n t e rf a c e . v e rs a t ile p a ral l e l o r 2-wir e s e r i al in t e r f ace a r ra n g em en t is co m p a t i b le wi th bo th 3 v a n d 5 v log i c. rev. a in fo rmatio n furn ish e d by an alo g d e v i ces is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any i n fri n gement s of p a t e nt s or ot her ri ght s of t h i r d p a rt i e s t h at may resul t from i t s use. s p ecificatio n s subj ect to ch an g e with o u t n o tice. no licen s e is g r an ted by implicatio n or ot herwi s e under any p a t e nt or p a t e nt ri ghts of analog devices. trademarks and registered trademarks are the prop erty of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4700 www.analog.com fax: 781. 326. 8703 ? 2003 analog devices, i n c. all r i ghts r e ser v ed .
ad7653 rev. a | page 2 of 28 table of contents specifications..................................................................................... 3 timing specifications....................................................................... 5 absolute maximum ratings............................................................ 7 pin configuration and function descriptions............................. 8 definitions of specifications ......................................................... 11 typical performance characteristics ........................................... 12 circuit information ........................................................................ 15 converter operation.................................................................. 15 typical connection diagram.................................................... 17 power dissipation vs. throughput ........................................... 19 conversion control.................................................................... 19 digital interface .......................................................................... 20 parallel interface ......................................................................... 20 serial interface ............................................................................ 20 master serial interface ............................................................... 21 slave serial interface .................................................................. 22 microprocessor interfacing....................................................... 24 application hints............................................................................ 25 bipolar and wider input ranges .............................................. 25 layout .......................................................................................... 25 evaluating the ad7653s performance .................................... 25 outline dimensions ....................................................................... 26 ordering guide........................................................................... 26 revision history location page 9/03data sheet changed from rev. 0 to rev. a change to product highlights .................................................... 1 changes to specifications ............................................................ 3 changes to absolute maximum ratings ................................... 7 changes to figure 15.................................................................. 13 changes to figure 22.................................................................. 16 changes to voltage reference input section ........................... 18 changes to figure 31.................................................................. 20
ad7653 specifications tale c to 5c add ddd 5 odd 7 to 55 unle otherwie note p a r a e t e r c o n i t i o n m i n t p m a u n i t r e s o l u t i o n 1 6 b i t s analog input voltage range v in C v ingnd 0 v ref v operating input voltage v in C 0 . 1 + 3 v v ingnd C 0 . 1 + 0 . 5 v analog input cmrr f in = 10 khz 65 db input current 1 msps throughput 12 a input impedance 1 throughput speed complete cycle in warp mode 1 s throughput rate in wa rp mode 1 1000 ksps time between conversions in warp mode 1 ms complete cycle in normal mode 1.25 s throughput rate in norm al mode 0 800 ksps complete cycle in impulse mode 1.5 s throughput rate in impulse mode 0 666 ksps dc accuracy integral linearity error C6 +6 lsb 2 no m i ssing cod e s 15 bits differential linearity error C2 +3 lsb transition noise 0.7 lsb unipolar zero error, t min to t max 3 2 5 l s b unipolar zero error temperature drift 0.2 ppm/c full-scale error, t min to t max 3 ref = 2.5 v 0.12 % of fsr full-scale error temperature drift 0.4 p p m / c power supply sensitivity avdd = 5 v 5%, with ref 2 lsb ac accuracy s i g n a l - t o - n o i s e f in = 100 khz 86 db 4 spurious free dynamic range f in = 100 khz 98 db t o tal harmonic distortion f in = 45 khz C98 db f in = 100 khz C96 db signal-to-(noise + distortion) f in = 100 khz 86 db C60 db input, f in = 100 khz 30 db C3 db input bandw idth 12 mhz sampling dynamics aperture delay 2 ns aperture j i tter 5 ps rms transient response full-scale step 250 ns r e f e r e n c e internal reference voltage v ref @ 25c 2.48 2.50 2.52 v internal reference temperature drift C40c to +85c 7 ppm/ c line regulation avdd = 5 v 5% 2 4 p p m / v turn-on settling time c ref = 10 f 5 ms temperature pin voltage output @ 25c 300 mv temperature sensitivity 1 mv/c output resistance 4.3 k? external reference voltage range 2.3 2.5 avdd C 1.85 v external reference current drai n 1 msps throughput 300 a r e v. a | pa ge 3 of 28
ad7653 p a r a e t e r c o n i t i o n m i n t p m a u n i t digital inputs loic leel il 3 ih ddd 3 i il 1 1 a i ih 1 1 a digital outputs data forat 5 pipeline dela 6 ol i sin 16 a oh i sou r ce 5 a odd 6 poer supplies specifie perforance a d d 7 5 5 5 5 d d d 7 5 5 5 5 o d d 7 55 7 operatin current 1 msps throuhput add ith reference an buffer 17 a add 1 reference an buffer alone 3 a ddd 11 67 a odd 11 a power diipation without ref 666 sps throuhput 11 1 1 5 1 sps throuhput 11 1 3 power diipation with ref 1 msps throuhput 1 1 5 temperature range 1 specifie perforance t min to t max 5 c 1 see an alo in put ect ion ls b e an l e a t i nif icant it ith the to 5 input rane 1 lsb i 315 3 see defin i t i on of specificat ion ect ion th ee pecificat ion o n o t in clue t h e error con t r iut ion fro t h e et e rn al referen ce all peci f i c a t i o n i n b a r e referre t o a full- ca l e i n put fs te t e wi t h a n i n put i n a l a t 5 b elow full- ca l e un le otherwi e p ecif ie 5 pa ra llel or eri a l 16- i t 6 c o ner i on re u l t are aail al e ie iatel af ter copl e te coner i on 7 the a h oul e the iniu of 55 an ddd 3 in arp oe ith re f p dre f an p d buf are lo wi thout ref pdref an pdbuf are high 1 i t h pd r e f pd buf lo a n pd high 11 i pule moe tet e i n pa ra llel r e a i n o e 1 c o n ul t f a cto r f o r e te n e t e perat ure ran e r e a pa e of
ad7653 timing specifications table 3. ?40c to +85c, avdd = dvdd = 5 v, ovdd = 2.7 v to 5.25 v, unless otherwise noted parameter symbol m i n t y p m a x u n i t refer to figure 26 and figure 27 convert pulse width t 1 1 0 n s time between conversions (warp mode/ n ormal mode/ i mpul s e mode) 1 t 2 1 / 1 . 2 5 / 1 . 5 s cnvst low to busy high delay t 3 3 5 n s busy high all modes except master serial read after convert (warp mode/ n ormal mode/ i mpul s e mode) t 4 0 . 7 5 / 1 / 1 . 2 5 s aperture delay t 5 2 n s end of conversion to busy low delay t 6 1 0 n s convers i on time (warp mode / n ormal mode/ i mpul s e mode) t 7 0 . 7 5 / 1 / 1 . 2 5 s acquisition time t 8 2 5 0 n s reset pulse wid t h t 9 1 0 n s refer to figure 28, figure 29, and ( p arallel interface m o d e s) cnvst low to data valid delay (warp mode/ n ormal mode/ i mpul s e mode) t 10 0 . 7 5 / 1 / 1 . 2 5 s data valid to busy low delay t 11 1 2 n s bus access request to dat a valid t 12 4 5 n s bus relinquish t ime t 13 5 1 5 n s refer to figure 32 and figure 33 (mas t er serial interface modes ) 2 cs low to sync valid delay t 14 1 0 n s cs low to internal sclk valid delay 2 t 15 1 0 n s cs low to sdout delay t 16 1 0 n s cnvst low to sync del a y (warp mode / n ormal mode/ i mpul s e mode) t 17 2 5 / 2 7 5 / 5 2 5 n s sync asserted to sclk first edge delay t 18 3 n s internal sclk period 3 t 19 2 5 4 0 n s internal sclk high 3 t 20 1 2 n s internal sclk low 3 t 21 7 n s sdout valid setup time 3 t 22 4 n s sdout valid hold t ime 3 t 23 2 n s sclk last edge to sync delay 3 t 24 3 n s cs high to sync hi-z t 25 1 0 n s cs high to internal sclk hi-z t 26 1 0 n s cs high to sdout hi-z t 27 1 0 n s busy high in master serial read after convert 3 (warp mode/ n ormal mode/ i mpul s e mode) t 28 see table 4 cnvst low to sync asserted delay (warp mode/ n ormal mode/ i mpul s e mode) t 29 0 . 7 5 / 1 / 1 . 2 5 s sync deasserted to busy low delay t 30 2 5 n s r e f e r t o a n d ( s l a ve serial interface modes ) 2 external sclk setup time t 31 5 n s external sclk active edge to sdout delay t 32 3 1 8 n s sdin setup time t 33 5 n s sdin hold time t 34 5 n s external sclk period t 35 2 5 n s external sclk high t 36 1 0 n s external sclk low t 37 1 0 n s f i g u r e 3 0 f i g u r e 3 4 f i g u r e 3 5 1in warp mod e onl y, the maximum time be t w een con v ersion s is 1 ms; ot h e rwise, the re is no re qu ired maximum time. 2 in s e rial interf ace mod e s , the sync , sc lk, an d sdout timings are d e f i ned with a maximum l o ad c l of 10 pf; otherwis e, the l o ad is 60 pf maximum. 3 in serial mast er read durin g con v ert m o d e . s e e f o r s e r i a l m a s t er read aft e r con v ert mode. t a b l e 4 r e v. a | pa ge 5 of 28
ad7653 tale serial cloc tiin in mater rea after conert d i s c l 1 1 1 d i s c l s o l 1 1 u n i t sync to scl firt ee dela miniu t 1 3 1 7 1 7 1 7 n internal scl perio miniu t 1 5 5 1 n internal scl perio maiu t 1 7 1 n internal scl high miniu t 1 5 1 n internal scl lo miniu t 1 7 1 n sdout ali setup tie miniu t 1 1 1 n sdout ali hol tie miniu t 3 3 n scl lat ee to sync dela miniu t 3 5 5 1 3 n busy high ith ma iu arp t 1 5 3 5 5 busy high ith maiu noral t 1 7 5 5 3 5 5 5 5 busy high ith ma iu ipul e t 5 3 5 5 7 5 r e a pa e 6 of
ad7653 absolute maximum ratings table 5. ad7653 absolute maximum ratings 1 p a r a m e t e r r a t i n g in 2 , temp 2 ,ref, refbufin, ingnd, refgnd to agnd avdd + 0.3 v to agnd ? 0.3 v ground voltage differences agnd, dgnd, ognd 0.3 v supply voltages avdd, dvdd, ovdd ?0.3 v to +7 v avdd to dvdd, avdd to ovdd 7 v dvdd to ovdd ?0.3 v to +7 v digital inputs ?0.3 v to dvdd + 0.3 v pdref, pdbuf 3 2 0 m a internal power dissipation 4 7 0 0 m w internal power dissipation 5 2 . 5 w junction temperature 150c storage temperature range ?65c to +150c lead temperature range (sol dering 10 s e c) 300c 1 st resses a b ove t h o se li st ed un der absolut e ma xi m u m r a t i n gs m a y ca use permanent d amage to the d e vice. this is a s t res s rating onl y; f u nctional o p e r atio n o f the d e vice at the s e o r any o the r co nd itio ns abo v e tho s e l i s t e d i n t h e opera t i o n a l sect i o n s of t h i s spec if ication is not impl i ed . e x pos ure to abs o l u te maximum rating cond itions for ext e n d ed peri ods m a y a ffect d e vice rel iabil ity. 2 s e e sect ion . 3 see volt age referen c e in put sect ion . 4 specif ication is f o r the d e vice in f r ee air: 48-lead lqfp; ja = 91c/w, jc = 30c/w 5 specif ication is f o r the d e vice in f r ee air: 48- lea d lfcsp; ja = 26c/w. a n alog in put i oh 500
ad7653 pin configuration and f unction descriptions 36 35 3 33 3 31 3 7 6 5 13 1 15 16 17 1 1 1 3 1 3 5 6 7 1 11 1 7 6 5 3 3 37 3 1 pin 1 identifier top ie not to scale agnd cnst pd reset cs rd dgnd agnd add nc bytesap obc arp impulse nc no connect ser par d d1 busy d15 d1 d13 ad7653 d3discl1 d1 d e x t i nt d 5 in syn c d6inscl d7 rdcs d in ognd odd d dd dgnd d s dout d s cl d 1syn c d1 1 rde rror p dbuf p dre f re fbufin temp a dd in agnd agnd nc ingnd re fgnd re f 66-- ddiscl f i u r e -l e a l fp st - an -l e a lfcsp cp - ta le 6 pi n f u nct i on de c ri pt i o n pin no mneonic tpe 1 d e c r i p t i o n 1 36 1 agnd p analo power groun pin add p input analo power pin noinall 5 3 nc no connect byt e sap di parallel m o e selection - 16-it hen lo the lsb i output on d7 an the msb i output on d15 hen high the lsb i output on d15 an the msb i output on d7 5 obc di straiht binarbinar two copleent hen obc i high the iital output i traiht inar when lo the msb i inerte reultin in a two copleent output fr o it internal hift reiter 6 arp di moe selection hen thi pin i high an the impulse pin i lo thi input elect the fatet oe the aiu throuhput i achieale an a iniu conerion rate ut e applie in orer to uarantee full pecifie accurac hen lo full accurac i aintaine inepenent of the iniu conerion rate 7 impulse di moe selection hen impulse i high an arp i lo thi input elect a reuce power oe in thi oe the power iipation i a pproiatel proportional to the aplin rate serpar di serialparallel selection input hen lo th e parallel port i electe when high the erial interface oe i electe an oe it of the data u are ue a a erial port 1 d1 do bit an bit 1 of the parallel po rt data output bu hen ser par i high thee output are in hih ipeance 11 1 d3or discl1 dio hen serpar i lo thee output are u e a bit an bit 3 of the parallel port ata output u hen serpar i high extint i lo an rdcsdin i lo erial ater rea after conert thee input part of the erial port are ue to lo w o wn if e ire the internal erial cloc that cloc the ata output in other eri al oe thee pin are not ue 1 3 d o r ext int dio hen serpar i lo thi output i ue a bit of the parallel port ata output u hen serpar i high thi input part of the erial port i ue a a iital elect input for choo- in the internal ata cloc or an e ternal ata cloc ith ext int tie lo the internal cloc i electe on the scl output ith ext int et to loic high output a ta i nchronie to an e ternal cloc inal connecte to the scl input 1 d 5 o r insync dio hen serpar i lo thi output i ue a bit 5 of the parallel port ata output u hen serpar i high thi input part of the erial por t i ue to elect the actie tate of the sync inal it i actie in oth ater an la e oe hen lo sync i actie high hen high sync i actie lo r e a pa e of
ad7653 pin no. mnemonic type 1 d e s c r i p t i o n 1 5 d 6 o r invsclk di/o when ser/par is low, this output is used as bit 6 of the parallel port data output bus. when ser/par is high, this input, part of the serial port, is used to invert the sc lk signal. it is active in both master and slave mod e s. 16 d7 or rdc/sdin di/o when ser/par is low, this output is used as bit 7 of the parallel port data output bus. when ser/par is high, this input, part of the serial port, is used as either an ex ternal data input or a read mode selection input depending on the state of ext/int . when ext/int is high, rdc/sdin could be used as a data input to daisy-chain the conversion results from two or more adcs onto a single sdout line. the digital data level on sdin is output on data with a delay of 16 sclk periods afte r the initiation of the read sequence. when ext/int is low, rdc/sdin is used to select the read mode. when rdc/sd in is high, the data is output on sdout during conversion. when rdc/ sdin is low, the data can be output on sdout only when the conversion is complete. 17 ognd p input/ output interface digital power ground. 18 ovdd p input/ output interface digi tal power. nominally at the same supply as the host interface (5 v or 3 v). 19 dvdd p digital power. nominally at 5 v. 20 dgnd p digital power ground. 2 1 d 8 o r sdout do when ser/par is low, this output is used as bit 8 of the parallel port data output bus. when ser/par is high, this output, part of the serial por t, is used as a serial data output synchro- nized to sclk. conversion results are stored in an on-chip register. the ad7653 provides the conversion result, m s b first, from its internal shif t register. the data format is determined by the logic level of ob/2c . in serial mode when ext/int is low, sdout is valid on both edges of sclk. in serial mode when ext/int is high, if invsclk is low, sdout is updated on the sclk rising edge and valid on the next falling edge; if invsclk is high, sdout is updated on the sclk falling edge and valid on the next rising edge. 2 2 d 9 o r sclk di/o when ser/par is low, this output is used as bit 9 of the parallel port data or sclk output bus. when ser/par is high, this pin, part of the serial port, is used as a serial data clock input or output, depending upon the logic state of the ext / int pin. the active edge where the data sdout is updated depends upon the logic state of the invsclk pin. 2 3 d 1 0 o r sync do when ser/par is low, this output is used as bit 10 of the parallel port data output bus. when ser/par is high, this output, part of the serial port, is used as a digital output frame synchronization for use with th e internal data clock (ext/ i nt = logic low) . when a read sequence is initiated and invsync is low, sy nc is driven high and remains high while the sdout output is valid. when a read sequence is initiated and i nvsync is high, sync is driven low and remains low while the sdout output is valid. 2 4 d 1 1 o r rderror do when ser/par is low, this output is us ed as bit 11 of the parallel port data output bus. when ser/par and ext/int are high, this output, part of the serial port, is used as an incomplete read error flag. in slave mode, when a data read is started and not complete when the following conversion is complete, the current data is lost and rderror is pulsed high. 25C28 d[12:15] do bit 12 to bit 15 of the parallel port data o utput bus. these pins are alwa ys outputs regardless of the state of ser/par . 29 busy do busy output. transitions high when a conver sion is started and remains high until the conversion is complete and the data is latche d into the on-chip shift register. th e falling edge of busy could be used as a data ready clock signal. 30 dgnd p must be tied to digital ground. 31 rd di read data. when cs and rd are both low, the interface parallel or serial output bus is enabled . 32 cs di chip select. when cs and rd are both low, the interface parallel or serial output bus is enabled . cs is also used to gate the ex ternal clock. 33 reset di reset input. when set to a logic high, this pin resets the ad7653 and the current conversion, if any, is aborted. if not used, this pin could be tied to dgnd. 34 pd di power-down input. when set to logic high , power consumption is reduced and conversions are inhibited after the current one is completed. 35 cnvst di start conversion. a falling edge on cnvst puts the internal sample/ h old into the hold state and initiates a conversion. in impulse mode (impulse high, warp low), if cnvst is held low when the acquisition phase (t 8 ) is complete, the internal sample/hol d is put into the hold state and a conversion is immediately started. r e v. a | pa ge 9 of 28
ad7653 pin no mneonic tpe 1 d e c r i p t i o n 37 ref aio reference input oltae on-chip reference output oltae 3 refgnd ai reference input analo groun 3 ingnd ai analo input groun 3 in ai priar analo input with a rane of to 5 5 temp ao teperature senor oltae output 6 refbufin aio reference input oltae the re ference output an the reference uffer input 7 pdref di t h i pin allow the choice of internal or eternal oltae reference hen lo the on-chip reference i turne on hen high the internal re ference i witche off an an eternal reference ut e ue pdbuf di thi pin allow the choice of ufferin an in ternal or eternal referenc e with the internal uffer hen lo the uffer i electe h en high the uffer i witche off 1 ai an a l o in put aio bi i rect i o n a l an a l o ao an a l o out p ut d i d i i t a l in put d io bi i rect i o n a l d i i t a l d o d i i t a l out p ut p power re a pae 1 of
ad7653 definitions of specifications integral nonlinearity error (inl) l i n e a r i t y er r o r r e fers to t h e de via t io n o f e a ch in di vid u a l co de f r o m a li n e d r a w n f r o m n e ga ti v e full scale th r o ugh posi ti v e full s c ale th e p o in t us ed as n e ga ti v e f u l l s c ale o c c u rs ls b bef o r e th e f i r s t cod e tra n si ti o n p o si ti v e full scale i s d e f i n e d a s a lev e l 1 l s b bey o n d th e la s t cod e tra n si ti o n t h e d e v i a t i o n i s m e as ur ed f r o m th e middle o f eac h co de t o th e tr ue s t ra ig h t lin e differential nonlinearity error (dnl) i n an i d e a l a d c c o d e t r ans i t i ons are 1 l s b a p ar t d i f f e r e n t i a l n o n l in e a r i ty is t h e maxim u m de via t io n f r o m t h is ide a l va l u e i t is o f t e n sp e c if ie d in t e r m s o f r e s o l u t i o n fo r w h ich n o missin g c o d e s are g u ar an te e d full-scale error th e las t tra n si tio n (f r o m 111 t o 1111 in tw os c o m p l e me n t c o d i ng ) shou l d o c c u r for an an a l o g volt age 1 l s b be lo w th e n o minal f u l l s c ale (29992 v f o r th e v t o 2 v ra n g e) th e f u l l -s cale er r o r is t h e de via t io n o f t h e ac t u al le v e l o f th e la s t tra n si ti o n f r o m th e i d eal lev e l unipolar zero error t h e f i r s t t r ans i t i on shou l d o c c u r a t a l e vel l s b ab ove an a l o g g r o u n d (19 v f o r th e v t o 2 v ra n g e) u n i p ola r er o e r r o r i s th e d e v i a t i o n o f th e a c t u al tra n si ti o n f r o m th a t po i n t spurious-free dynamic range (sfdr) s f d r is t h e dif f er en ce in de ci b e ls (db) b e tw e e n t h e r m s a m pli t ude o f t h e in p u t sig n al a n d t h e p e ak s p ur io us sig n al effective number of bits (enob) en o b m m p d s n d m en o b s n d db 1 d p d total harmonic distortion (thd) t h d i s th e ra ti o o f th e rm s s u m o f th e f i r s t f i v e h a rm o n i c co m p o n en ts t o t h e r m s val u e o f a f u l l -s cale in p u t sig n al a n d is exp r es s e d in de ci b e ls signal-to-noise ratio (snr) s n r i s th e ra ti o o f th e rm s v a l u e o f th e a c t u al i n p u t si gn al t o th e r m s su m of a l l ot he r sp e c t r a l c o m p one n t s b e l o w t h e n y u i s t f r e uen c y excl udin g ha r m o n ics a n d dc th e va l u e fo r s n r is exp r es s e d in de ci b e ls signa l -to-(noise + distortion) ra tio (s/[n+ d ]) s/ (n +d ) i s th e ra ti o o f th e rm s v a l u e o f th e a c t u al i n p u t si gn al to t h e r m s su m of a l l ot he r sp e c t r a l c o m p one n t s b e l o w t h e n y u ist f r e uen c y in cl udin g ha r m o n ics b u t excl udin g dc th e val u e fo r s/(n+d) is exp r es s e d in de ci b e ls aperture delay a p er t u r e de la y is a m e as ur e o f t h e ac u isi t io n p e r f o r ma n c e a n d is m e asur e d f r o m t h e fa l l in g e d ge o f t h e cnv s t in p u t t o w h en t h e in p u t sig n a l is h e ld fo r a co n v ersio n tra n sient response t r a n sien t r e s p o n s e is th e tim e r e u ir ed f o r th e ad t o ac hiev e i t s ra t e d accurac y a f t e r a f u ll-scale s t ep f u n c tio n is a p plie d t o i t s in p u t overvoltage recovery o v er v o l t a g e r e co v e r y is t h e t i m e r e u ir e d fo r t h e ad c t o r e co v e r t o f u l l acc u rac y a f t e r a n a n alog in p u t sig n al 1 o f th e f u l l -s cale val u e is r e d u ced t o o f th e f u l l -s cale val u e reference voltage temperature coefficient refer e n c e v o l t a g e t e m p era t ur e co ef f i cien t is t h e cha n g e o f in t e r n al r e fer e n c e v o l t a g e o u t p u t v o l t a g e v p m p d m d p c p d p p m c t 1 1 1 c = t t v t v t v c ppm tcv v c v c v t v t m p c v t 1 v t m p 1 c 11
ad7653 typical performance characteristics code inl l sb 3 1 3 1 163 376 65536 15 66--3 f i gur e 5 . int e gr a l no nl i n ea ri t y vs . c o de code in he counts 7ffb 0 20000 60000 40000 80000 140000 120000 8000 8001 8003 8002 02966-0-027 8004 7ffc 7ffd 7ffe 7fff 100000 17001 00 0 0 377 679 15906 114641 112516 f i g u r e 6. his t og r a m of 261,120 convers i ons of a dc input a t the c o de t r a n si ti o n frequency (kh) amplitude ( d b of full scale) 0 180 160 120 140 100 60 80 0 200 300 500 400 02966-0-029 100 40 20 f s = 1000ksps f in = 101kh snr = 86.0db thd = 90.3db sfdr = 91.5db s/n+d = 84.8db f i gur e 7. fft p l ot code dnl (ls b ) 0 1.0 0.5 0.5 0 1.0 2.0 1.5 16384 32768 65536 49152 02966-0-026 f i g u r e 8. d i f f e r e nt ial nonlinearit y v s . code code in he counts 0 20000 80000 40000 100000 160000 120000 8000 8001 8003 8002 02966-0-028 8004 7ffc 7ffd 7ffe 7fff 0 53 2856 3099 90 60000 146148 54473 54482 140000 f i g u r e 9. his t og r a m of 261,120 convers i ons of a dc input a t the c o de c e nt er frequency (kh) s nr, s / n+d (db) 1 72 75 81 78 84 90 100 02966-0-030 1000 10 87 enob ( b it s) 15.0 12.0 14.5 12.5 13.0 13.5 14.0 enob snr s/n+d f i gur e 10. snr, s/(n+d), and e n ob v s . f r equenc y rev. a | page 12 of 28
ad7653 frequency (khz) thd, harmonics (db) 1 120 100 80 90 70 50 100 02966-0-031 1000 10 60 s f dr (db) 120 0 100 20 40 60 80 second harmonic sfdr third harmonic 110 thd f i gur e 11. thd , harmonics, and sfdr v s . f r equenc y input level (db) s nr, s / n+d re fe rre d to full s cale (db) 60 82 92 02966-a-032 0 50 40 30 20 1 0 83 84 85 86 87 88 89 90 91 snr s/n+d f i gur e 12. snr and s/(n+d) vs . input l e v e l (referr e d t o f u l l s c al e) temperature ( c) s nr, s / n+d (db) 55 85 89 02966-0-033 125 35 15 25 45 65 86 87 88 snr enob sn+d 58 5 105 13.75 14.75 14.00 14.25 14.50 enob ( b it s) f i gur e 13. snr, s/(n+d), and e n ob v s . t e mper atur e temperature ( c) thd, harmonics (db) 5 5 125 9 5 02966-0-034 125 35 15 25 45 65 115 105 second harmonic 58 5 105 third harmonic thd f i g u r e 14. thd and harmonics v s . t e mper at ur e sample rate (sps) 10 02966-0-036 1000000 100 10000 100000 1 100 1000 10 1000 100000 0.001 0.1 0.01 op e ratin curre nt ( f i gur e 1 5 . o p er a t i n g c u rr ent vs . s a m p l e r a t e temperature (c) ze ro e rror, full s cale (ls b ) 55 6 02966-0-040 125 35 5 25 45 65 2 3 5 1 5 85 105 4 0 1 1 3 2 5 4 6 zero error full scale f i g u re 1 6 . z e ro e r ro r , f u l l s c a l e w i t h r e f e re n c e v s . t e m p e r a t u r e rev. a | page 13 of 28
ad7653 temperature (c) vr ef ( v ) 40 2.5008 2.5020 02966-0-038 2 0 0 20 40 60 2.5010 2.5012 2.5013 2.5014 2.5015 2.5016 2.5017 2.5018 2.5019 80 100 120 2.5009 2.5011 f i gur e 17. t y pic a l r e fer e nc e o u tput v o ltage v s . t e mper atur e reference drift (ppm/ c) numbe r of units 30 0 30 50 40 60 90 80 02966-0-039 26 22 1 8 14 70 1 0 6 2 2 3 0 26 22 18 14 10 6 20 10 f i g u r e 18. r e f e r e nc e v o lt ag e t e mper at ur e coef f i cient d i s t ribut i on (335 u n it s ) c l (pf) t 12 de lay (ns ) 0 0 50 02966-0-035 200 50 100 150 10 30 40 20 ovdd = 5v 25c ovdd = 5v 85 c ovdd = 2.7v 25 c ovdd = 2.7v 85 c f i g u r e 19. t y pic a l d e lay v s . l oad capacit a nc e c l rev. a | page 14 of 28
ad7653 circuit information sw a comp sw b in ref refgnd lsb msb 32,768c ingnd 16,384c 4c 2c c c 65,536c contr o l logic switches contr ol bu s y output code 02966-0-005 cnvst f i g u r e 20. a d c simplif ied s c hemat i c i g u re 2 0 th e ad7653 is a v e r y fas t , lo w p o w e r , sin g le s u p p l y , p r ecis e 16-b i t a n alog-t o-dig i tal co n v er t e r (ad c ). th e ad7653 f e a t ur es dif f er en t m o des t o o p t i mize p e r f o r ma n c e acco r d in g t o t h e a p plica t io n. i n w a r p m o de, t h e p a r t ca n co n v er t 1 mi l l io n sa m p l e s pe r sec o n d . f r o m t h e in p u ts a n d co nn e c te d to ref g nd . th er efo r e, t h e dif f er en tial v o l t a g e betw een in a n d in gnd ca p t ur ed a t th e en d o f t h e acq u isi t io n phas e is a p plie d t o t h e co m p a r a t o r in p u ts, ca usin g th e co m p a r a t o r t o beco m e un bala n c ed . b y swi t c h in g e a ch e l em en t o f t h e ca p a ci t o r a r ra y b e tw e e n refgnd a n d ref , t h e co m p a r a t o r in p u t va r i es b y b i na r y w e ig h t e d v o l t a g e s t eps (vref/2, vref/4, vref/65536). th e co n t r o l log i c t o g g l es th e s e sw i t c h e s , s t a r ti n g w i th th e ms b , t o b r i n g th e co m p a r a t o r ba c k i n t o a bala n c ed co n d i t i o n . th e ad7653 p r o v ides th e us er wi th a n o n -c hi p trac k/h o ld , s u cces si v e a p p r o x ima t io n ad c t h a t do es n o t exhi b i t a n y p i p e lin e o r la t e n c y , makin g i t ide a l f o r m u l t i p le m u l t i p lexe d c h a n n e l ap p l i c at i o n s . af t e r this p r o c es s is co m p let e d , th e co n t r o l log i c g e n e ra t e s th e ad c o u t p u t co de a n d b r in gs th e b u s y o u t p u t l o w . th e ad7653 ca n be o p era t ed f r o m a sin g le 5 v s u p p l y a n d ca n be in t e r f aced t o ei th er 5 v o r 3 v dig i tal log i c. i t is h o us ed in ei t h er a 48-le ad lqfp o r a 48-le ad lfcs p t h a t s a ves sp ace a n d al lo ws f l exi b le co nf igura t io n s as ei t h er a s e r i al o r a p a ral l e l in t e r f ace . th e ad7653 is a p i n-t o -p in co m p a t i b le u p g r ade o f th e ad7651/ad7652. modes of operation th e ad7653 f e a t ur es thr e e m o des o f o p era t io n s : w a r p , n o r m al , a n d i m p u ls e . e a ch m o de is b e st sui t e d fo r sp e c if ic a p plica t io n s . w a r p m o de al lo ws t h e fas t es t co n v ersio n ra t e u p t o 1 ms ps. h o w e v e r in t h is m o de a n d t h is m o de o n ly , t h e f u l l sp e c if ie d acc u rac y is gua r a n t e e d o n l y w h en t h e t i m e b e tw e e n co n v ersio n s do es n o t exce e d 1 m s . i f t h e t i m e b e tw e e n tw o co n s e c u t i v e co n v ersio n s is lo n g er tha n 1 m s (e .g., a f t e r p o w e r - u p ), th e f i rs t co n v ersio n r e s u l t s h o u ld be ig n o r e d . this m o de mak e s th e ad7653 ideal f o r a p p l ica t io n s wh er e bo th hig h acc u rac y a n d fas t s a m p le ra t e a r e r e q u ir ed . converter operation th e ad7653 is a s u cces s i v e a p p r o x ima t io n ad c bas e d o n a ch ar ge re d i st r i but i on d a c . f show s a s i m p l i f i e d sc h e m a ti c o f th e a d c . t h e ca pa ci ti v e d a c co n s i s t s o f a n a r ra y o f 16 b i na r y w e ig h t e d ca p a ci to rs a n d a n addi t i o n a l ls b ca p a ci t o r . th e co m p a r a t o r s n e ga ti v e in p u t is co nn ec t e d t o a d u mm y ca p a ci t o r o f t h e s a m e val u e as t h e ca p a ci t i v e d a c a r ra y . n o r m al m o de is th e fas t es t m o de (800 ks ps) wi th o u t a n y li m i ta ti o n s o n th e ti m e be t w ee n co n v e r si o n s. t h i s m o d e m a k e s th e ad7653 ideal f o r asyn c h r o n o us a p p l ica t io n s s u c h as da ta acq u isi t io n sys t em s, w h er e b o t h hig h acc u rac y a n d fas t s a m p le ra t e a r e r e q u ir ed . d u r i n g t h e acq u isi t io n phas e , t h e co mm o n t e r m ina l o f t h e a r ra y ti ed t o th e co m p a r a t o r s posi ti v e i n p u t i s co n n ect e d t o a g n d via sw a. a l l in dep e n d en t swi t ch es a r e co nn e c t e d t o t h e a n alog in p u t in. th us, th e ca p a ci t o r a r ra y is us ed as a s a m p lin g ca p a ci t o r a n d acq u ir es th e a n alog sig n al o n in. s i mila rl y , th e d u mm y ca p a ci t o r acq u ir es t h e a n alog sig n al o n in gnd . i m p u ls e m o de, t h e lo w e st p o w e r dissi p a t io n m o de, a l lo ws p o w e r s a vin g b e tw e e n co n v ersio n s. w h en o p era t in g a t 1 ks ps, fo r exa m p l e , i t typ i cal l y co n s um es o n l y 138 w . this f e a t ur e mak e s th e ad7653 ideal f o r ba t t er y-p o w e r e d a p p l ica t io n s . wh e n cnv s t g o es l o w , a co n v ersio n phas e is ini t ia t e d . w h en t h e co n v ersio n phas e b e g i n s , sw a a n d swb a r e o p en e d . th e ca p a ci t o r a r ra y a n d d u mm y ca p a ci t o r a r e th en dis c o n n e c t ed rev. a | page 15 of 28
ad7653 transfer functions us i n g t h e o b / 2c dig i tal in p u t th e ad o f f e rs tw o o u t p u t co din g s st r a ig h t b i na r y a n d tw o s co m p lem e n t th e ls b sie is v ref / whic h is a b o u t 1 v th e ad s ideal t r a n sfer cha r ac t e r i st ic is sh o w n i n a n d t a b l e ta ble out p ut codes a nd idea l input volt a g es digital output code (hex) description analo g input straight binary twos complement fsr 1 lsb 29992 v ffff 1 f f f 1 fsr 2 lsb 29992 v fffe ffe midscale + 1 lsb 12 v 1 1 midscale 12 v midscale 1 lsb 12992 v fff ffff fsr + 1 lsb v 1 1 fsr v 2 2 f i gur e 2 1 f i gur e 21 a d c ideal t r ansfer f u nc tion 1 1 11111 11111 111111 adc code (s tra i ght bina ry ) analo input v ref 1 lsb v ref 1 lsb 1l s b v lsb 1 lsb v re f / 29-- 1 th i s i s a lso t h e code for overra n g e a n a l og i n put (v in v in n d above v re f v re f nd ) 2 th i s i s a lso t h e code for un derra n g e a n a l og i n put (v in below v in n d ) no tes 1 the confiuration shon is usin the internal reference and internal buffer 2 the ad21 is recommended see driver amplifier choice section optional lo itter a 1 ? ?
ad7653 typical connection diagram w h en t h e swi t ch es a r e o p en e d , t h e in p u t im p e da n c e is limi t e d t o c1. r1 a n d c2 mak e a 1-p o le lo w-p a s s f i l t er tha t r e d u ces un desira b l e aliasin g ef fe c t s a n d limi ts th e n o is e . f i gur e 2 2 s h o w s a typ i cal co nn ec tio n dia g ra m f o r th e ad7653. analog input w h en t h e s o ur ce im p e da n c e o f t h e dr i v in g cir c ui t is lo w , t h e ad7653 ca n be dr i v en dir e c t l y . l a rg e s o ur ce im p e da n c es wil l si gn i f i c a n tl y a f f e ct th e a c pe rf o r m a n c e , e s peci all y t o tal h a r m on i c d i stor t i on . f i gur e 2 3 f i g u r e 23. equiv a lent a n alog input cir c uit s h o w s a n eq ui valen t cir c ui t o f th e in p u t s t r u c t ur e o f th e ad7653. th e tw o dio d es, d1 a n d d2, p r o v ide es d p r o t e c t i o n fo r t h e a n alog in p u ts in a n d in gnd . c a r e m u s t be tak e n t o en s u r e th a t th e a n alog i n p u t si gn al n e v e r e x ceed s th e s u p p l y ra ils b y m o r e t h a n 0.3 v . this wi l l ca us e t h es e dio d es t o b e co m e fo r w a r d-b i as e d a n d s t a r t co n d uc t i n g c u r r en t. th es e dio d es ca n ha n d le a f o r w a r d-b i as ed c u r r en t o f 100 ma maxim u m. f o r in s t a n ce , t h es e co n d i t io n s co u l d e v en t u al l y o c c u r w h en t h e in p u t b u f f er s (u1) s u p p lies a r e dif f er en t f r o m a v d d . i n s u ch a cas e , a n in p u t b u f f er wi t h a sh o r t-cir c ui t c u r r en t limi t a t i o n ca n be used t o p r o t ect th e pa r t . driver amplifier choice al th o u g h th e ad7653 is easy t o dr i v e , th e dr i v er a m p l if ier n eeds t o m e et t h e fol l o w in g r e q u ir em en ts: ? th e dr i v er a m p l if ier a n d th e ad7653 a n alog in p u t cir c ui t m u s t be a b le t o s e t t le f o r a f u l l -s cale s t ep o f th e ca p a ci t o r a r ra y a t a 16-b i t lev e l (0.0015%). i n th e a m p l if ier s da ta s h eet, s e t t lin g a t 0.1% t o 0.01% is m o r e co mm o n l y sp e c if ie d . this co u l d dif f er sig n if ica n t l y f r o m t h e s e t t lin g tim e a t a 16-b i t lev e l a n d s h o u ld be v e r i f i ed p r io r t o dr i v er s e lec t io n. th e tin y o p a m p ad8021, whic h co m b in es u l t r a l o w n o is e a n d hig h ga in-b a n d w id t h , m e ets t h is s e t t lin g t i m e r e q u ir em en t e v en w h en us e d wi t h ga in s u p t o 13. c2 r1 d1 d2 c1 in o r ingnd agnd av d d 02966-0-008 ? th e n o is e g e n e ra t e d b y t h e dr i v er a m plif ier n e e d s t o b e k e p t as lo w as p o s s i b le in o r der t o p r es er v e th e s n r a n d tra n si tio n n o is e p e r f o r ma n c e o f th e ad7653. th e n o is e co min g f r o m th e dr i v er is f i l t er ed b y th e ad7653 a n alog in p u t cir c ui t 1-p o le lo w-p a s s f i l t er made b y r1 a n d c2 o r b y t h e ext e r n al f i l t er , if o n e is us e d . this a n alog in p u t s t r u c t ur e al lo ws t h e s a m p lin g o f t h e dif f er en t- tial sig n al betw een in a n d in gnd . u n lik e o t h e r co n v er t e rs, in gnd is s a m p led a t th e s a m e tim e as in. b y usin g this dif f er - en ti al i n p u t , sm all si gn als co m m o n t o bo th i n p u t s a r e r e ject ed . f o r in s t a n ce , b y usin g in gnd t o s e n s e a r e m o t e sig n al g r o u n d , g r o u n d p o t e n t ial dif f er en ces b e tw e e n t h e s e n s o r a n d t h e lo cal ad c g r o u n d a r e e l imina t e d . ? th e dr i v er n e e d s t o ha v e a thd p e r f o r ma n c e s u i t a b le t o tha t o f th e ad7653. th e ad8021 m e ets t h es e r e q u ir em en ts a n d is a p p r o p r i a t e fo r alm o s t all a p p l i c a t i o n s . t h e ad8021 n eed s a 10 pf e x t e rn al co m p en s a tio n ca p a ci t o r tha t s h o u ld ha v e g o o d lin e a r i t y as a n npo cera mic o r mica ty p e . d u r i n g t h e acq u isi t io n phas e , t h e im p e da n c e o f t h e a n alog in p u t in ca n b e m o dele d as a p a r a l l el co m b ina t io n o f ca p a ci to r c1 a n d t h e n e tw o r k fo r m e d b y t h e s e r i es co nn e c t i o n o f r1 a n d c2. c1 is p r ima r il y th e p i n ca p a ci ta n c e . r1 is typ i cal l y 168 ? a n d is a lu m p e d c o m p one n t m a d e up of s o me s e r i a l re s i stor s and t h e o n r e sis t a n ce o f th e swi t c h es. c2 is typ i cal l y 60 pf a n d is ma inl y t h e ad c s a m p lin g ca p a ci t o r . d u r i n g t h e co n v ersio n phas e , th e a d 8 0 2 2 co ul d al so be used i f a d u al v e r s i o n i s n eed ed a n d ga in o f 1 is p r es en t. th e ad829 is a n a l t e r n a t i v e in a p plica t io n s wh er e hig h f r eq uen c y (a bo v e 100 kh z) p e r f o r ma n c e is n o t r e q u ir e d . i n ga in o f 1 a p plica t io n s , i t r e q u ir es a n 82 pf co m p en s a tio n ca p a ci t o r . th e ad8610 i s an opt i on w h e n l o w b i as c u r r en t is n e e d e d in lo w f r e q uen c y a p plica t io n s . rev. a | page 17 of 28
ad7653 voltage reference input th e ad al lo ws th e c h o i ce o f ei th er a v e r y lo w t e m p era t ur e d r i f t i n te r n a l vo lt age re f e re nc e or an e x te r n a l 2 v re f e re nc e f o r a p p l ica t io n s tha t us e m u l t i p le ads i t is m o r e ef f e c t i v e t o us e t h e in t e r n al b u f f er t o b u f f er t h e r e fer e n c e v o l t a g e u n lik e ma n y ad cs wi th in t e r n al r e f e r e n c es th e in t e r n al r e f e r e n c e o f th e ad p r o v ides exce l l en t p e r f o r ma n c e a n d ca n b e us e d in a l m o st a l l a p plica t io n s c a r e s h o u ld b e t a k e n wi t h t h e v o l t a g e r e fer e n c e s t e m p era t ur e c o e f f i c i e n t wh i c h d i r e ctl y a f f e ct s th e full - s c a l e a c cu ra c y i f th i s p a ra m e t e r ma t t er s f o r in s t a n ce a 1 p p m /c t e m p era t ur e co ef f i cien t o f t h e r e fer e n c e cha n g e s f u l l s c ale b y 1 ls b/c t o us e t h e in t e r n al r e fer e n c e alo n g wi t h t h e in t e r n al b u f f er p d ref a n d p d b u f s h o u ld bo th be l o this wil l p r o d uce a 12 v v o l t a g e o n refb ufin whic h a m p l if ied b y th e b u f f er w i l l re su lt i n a 2 v re f e re nc e on t h e r e f pi n no t e t h a t v ref ca n be in cr eas e d t o a v d d 1 v s i n c e th e in p u t ra n g e is def i n e d in t e r m s o f v ref t h is w o u l d ess e n t ia l l y in cr eas e th e ra n g e t o v t o v wi th a n a v d d a b o v e v th e ad ca n be s e lec t ed wi th a v r e f e r e n c e v o l t a g e th e o u t p u t im p e da n c e o f refb ufin is 11 k (minim um) w h en t h e r e f e r e n c e is ena b le d i t is us ef u l t o deco u p le refb ufin wi th a 1 nf cera mic ca p a ci t o r th us th e 1 nf ca p a ci t o r p r o v ides a n r c f i l t er fo r n o is e r e d u c t io n th e temp p i n whic h m e as ur es th e t e m p era t ur e o f th e ad ca n be us ed as s h o w n i n th e o u t p u t o f th e temp p i n is a p plie d t o o n e o f t h e in p u ts o f t h e a n a l og swi t ch (e g ad 9 ) a n d th e ad c i t s e lf is us ed t o m e as ur e i t s o w n t e m p era t ur e this co nf igura t io n is v e r y us ef u l fo r im p r o v in g t h e cali b r a t io n acc u rac y o v er t h e t e m p era t ur e ra n g e f i gur e 2 f i gur e 24. t e mp er atur e s e nsor c o nnec t ion d i agr a m t o us e a n et e r n al r e fer e n c e alo n g wi t h t h e in t e r n al b u f f er , p d ref s h o u ld be hi h a n d p d b u f s h o u ld be l o w . this p o we r s d o w n t h e i n te r n a l re f e re nc e and a l l o w s t h e 2 . 5 v r e f e r e n c e t o be a p p l ied t o refb ufin. ad779 ad8021 c c 02966-0-024 a nalo inpu t (unipolar) ad7653 in t emper a t u r e sen so r temp t o u s e an e te r n a l re f e re nc e d i re c t ly on t h e r e f pi n , pdr e f a n d p d b u f s h o u ld bo t h be hi h. pdr e f and pdb u f , re sp e c t i vely , p o we r down t h e in te r n a l re f e re nc e and t h e i n te r n a l re f e re nc e. n o te t h a t t h e pdr e f and p d b u f in p u t c u r r en t s h o u ld n e v e r eceed 20 ma. this co u l d e v en t u al l y o c c u r w h en in p u t v o l t a g e is a b o v e a v d d (fo r in s t a n ce a t p o w e r - u p ). i n this cas e , a 100 s e r i es r e sis t o r is re c o m m e n d e d. power supply th e ad us es thr e e p o w e r s u p p l y p i n s a n a n alog v s u p p l y a v dd a dig i t a l v co r e su p p ly d v dd a n d a dig i t a l in p u t/o u t p u t in t e r f ace su p p ly o v dd o v dd a l lo ws dir e c t in t e r f ace wi th a n y log i c betw een 2 v a n d d v d d + v t o r e d u ce t h e s u p p lies n e e d e d t h e dig i t a l co r e (d vd d) ca n b e su p p l i e d t h rou g h a s i m p l e rc f i l t e r f r om t h e ana l o g su p p ly as s h o w n i n th e ad is in dep e n d en t o f p o w e r s u p p l y s e u en cin g o n ce o v d d do es n o t exce e d d v d d b y m o r e tha n v a n d is th us f r ee o f s u p p l y v o l t a g e in d u ced la t c h-u p th e in t e r n al r e fer e n c e is t e m p era t ur e co m p en s a t e d t o 2 v 2 mv th e r e fer e n c e is t r imm e d t o p r o v ide a ty p i ca l dr if t o f this ty p i ca l dr if t cha r ac t e r i st ic is sh o w n i n f o r im p r o v ed dr if t p e r f o r ma n c e a n ext e r n al r e f e r e n c e s u c h as th e ad ca n be us ed p p m / c f i gur e 1 f i gur e 2 2 th e ad v o l t a g e r e f e r e n c e in p u t ref has a d y na mic in p u t im p e da n c e i t s h o u ld t h er efo r e b e dr i v en b y a lo w im p e da n c e s o ur ce wi t h ef f i cien t de co u p lin g b e tw e e n t h e ref a n d ref nd i n put s t h i s d e c o upl i ng d e p e nd s on t h e choi c e of t h e vo lt age re f e re nc e but u s u a l l y c o ns i s t s of a l o w e s r c a p a c i tor c o n n e c te d to ref a n d ref nd wi t h minim u m p a rasi t i c in d u c t a n ce a 1 f (r 12 sie) cera mic c h i p ca p a ci t o r (o r f t a n t al um ca p a ci t o r) is a p p r o p r i a t e w h en usin g ei t h er t h e in t e r n al r e fer e n c e o r o n e o f t h es e r e co mm en de d r e fer e n c e vol t age s ? ? ?
ad7653 th e cnv s t trace s h o u ld be s h ie lded wi th g r o u n d a n d a lo w val u e s e r i al r e sis t o r (i .e ., 50 ? ) ter m ina t io n sh o u ld b e adde d clos e t o t h e o u t p u t o f t h e co m p o n en t t h a t dr i v es t h is lin e . power dissipation vs. throughput o p era t in g c u r r en ts a r e v e r y lo w d u r i n g t h e acq u isi t io n phas e , al lo win g sig n if ica n t p o w e r s a vin g s w h en t h e co n v ersio n ra t e is re d u c e d ( s e e f ) . t h i s p o we r s a v i ng s d e p e nd s on t h e m o de us ed . i n i m p u ls e m o de , th e ad7653 a u t o ma tical l y r e d u ces p o w e r co n s um p t io n a t th e en d o f eac h co n v ersio n phas e . this ma k e s t h e p a r t ide a l fo r v e r y lo w p o w e r b a t t er y a p plica t io n s . th e dig i t a l in t e r f ace a n d t h e r e fer e n c e r e ma in ac t i ve e v en d u r i n g t h e acq u isi t io n phas e. t o r e d u ce o p era t in g dig i tal s u p p l y c u r r en ts ev en f u r t h e r , dig i tal in p u ts n eed t o be dr i v en clos e t o t h e p o w e r s u p p l y ra i l s (i .e ., d v d d o r d g nd), a n d o v d d s h o u ld n o t exceed d v d d b y m o r e tha n 0.3 v . i g u re 2 5 f i gur e 2 5 . p o w e r di ssi pa ti o n vs . s a m p l i n g r a t e f o r a p plica t io n s w h er e s n r is cr i t ica l , t h e cnv s t sig n al s h o u ld ha ve ver y lo w ji t t er . this ma y b e achie v e d b y usin g a de dica te d oscilla t o r f o r cnv s t ge ne r a t i on , or to cl o c k cnv s t wi t h a hig h f r eq uen c y , lo w ji t t er c l o c k, as s h o w n i n . f i gur e 2 2 bu s y mode t 2 t 1 t 3 t 4 t 5 t 6 t 7 t 8 a c q uire conver t a cq uire conver t 02966-0-011 cnvst sample rate (sps) 10 02966-0-041 1000000 100 10000 100000 1000 10000 100 1000 1000000 10 warp mode power impulse mode power 100000 pow e r d i ssipa tion ( conversion control f i gur e 2 6 f i gur e 26. basic con v ersion t i ming t 9 t 8 reset data busy 02966-0-011 cnvst s h o w s th e d e ta iled ti m i n g d i a g ra m s o f th e co n v e r si o n p r o c es s. th e ad7653 is co n t r o l l ed b y th e cnv s t sig n al , whic h ini t ia t e s co n v ersio n . on ce ini t ia t e d , i t ca nn o t b e r e st a r t e d o r a b o r t e d , e v en b y t h e p o w e r - do wn in p u t p d , un t i l t h e co n v ersio n is co m p let e . cnv s t o p era t es in dep e n d en t l y o f cs and rd . f i g u r e 27. r e se t timing t 1 t 3 t 4 t 11 bu s y da t a bu s cs = rd = 0 t 10 previous conversion d a t a new d a t a 02966-0-012 cnvst in imp u l s e m o d e , c o n v e r s i o n s c a n b e au t o m a t i c a l l y i n it i a t e d . if cnv s t is h e ld l o w wh en b u s y is l o w , th e ad7653 co n t r o ls t h e acq u isi t io n phas e a n d a u t o ma t i ca l l y ini t ia t e s a n e w co n- v e rsio n. by k e ep in g cnv s t l o w , th e ad7653 k e eps th e co n v ersio n p r o c ess r u nnin g b y i t s e lf. i t sh o u ld b e n o te d t h a t t h e a n alog in p u t m u s t be s e t t led wh en b u s y g o es lo w . als o , a t po w e r - u p , cnv s t shou l d b e brou g h t lo w onc e to i n it i a te t h e co n v ersio n p r o c es s. i n this m o de , th e ad7653 ca n r u n s l ig h t l y fas t er tha n th e gua r a n t eed 666 ks ps limi ts in i m p u ls e m o de . this fe a t ur e do es n o t exis t in w a r p a n d n o r m al m o des. f i g u r e 28. m a s t er p a r a llel d a t a timing f o r r e ading (cont i nuous r e ad) al th o u gh cnv s t i s a d i gi tal s i gn al , i t s h o u l d be d e s i gn ed w i th s p eci a l ca r e w i th fa s t , c l ea n ed g e s , a n d l e v e l s w i th m i n i m u m ove r sho o t and u n d e r s ho ot or r i ng i n g . rev. a page 19 of 28
ad7653 current conersion busy da t a bus t 1 t 13 66--13 rd cs diital interface th e ad7653 has a v e rs a t ile dig i tal in t e r f ace; i t ca n be in t e r f aced wi t h t h e h o s t sys t em b y usin g ei t h er a s e r i al o r a p a ral l e l in t e r - face . th e s e r i al in t e r f ace is m u l t i p lexe d o n t h e p a ral l e l da t a b u s. th e ad7653 dig i tal in t e r f ace als o acco mm o d a t es bo th 3 v a n d 5 v l o g i c b y s i m p ly c o nne c t i ng t h e o v dd su p p ly p i n of t h e ad7653 t o th e h o s t sys t em in t e r f ace dig i tal s u p p l y . f i nal l y , b y usin g th e o b / 2c i n put pi n , b o t h t w o s c o m p l e me n t and s t r a i g h t b i na r y co din g ca n b e us e d . th e tw o sig n als, cs and rd , c o n t r o l t h e i n t e r f a c e . cs and rd ha v e a simi la r ef fe c t b e ca us e t h e y a r e o r d t o g e t h er in t e r n al l y . w h en a t le as t o n e o f t h es e sig n als is hi gh, t h e in t e r f ace o u t p u t s a r e in hig h im p e da n c e . u s ua l l y cs al lo ws th e s e le c t io n o f eac h ad7653 in m u l t icir c u i t a p p l ica t io n s a n d is h e ld l o w in a sin g le ad7653 desig n . rd is g e n e ral l y us ed t o ena b le th e c o n v e r s i on re su lt on t h e d a t a bu s . parallel interf ace th e ad7653 is co nf igur ed t o us e th e p a ral l e l in t e r f ace wh en se r / pa r is h e ld l o w . th e da ta ca n be r e ad ei th er a f t e r eac h co n v ersio n , w h ich is d u r i n g t h e n e xt acq u isi t io n phas e , o r d u r i ng t h e f o l l ow i n g c o n v e r s i on , a s show n i n f and , r e s p ecti v e l y . w h e n th e d a ta i s r e a d d u ri n g th e co n v ersio n , h o w e v e r , i t is r e co mm en ded tha t i t is r e ad o n l y d u r i n g th e f i rs t half o f th e co n v ersio n p h as e . this a v o i ds a n y po t e n t i a l f eed th r o ugh be t w ee n v o l t a g e tra n si e n t s o n th e d i gi tal in t e r f ace a n d th e m o s t cr i t ical a n alog co n v ersio n cir c ui tr y . i g u re 2 9 f i g u r e 29. slave p a r a llel d a t a timing f o r r e ading (r ead a f ter con v er t mode) f i gur e 3 0 f i g u r e 30. slave p a r a llel d a t a timing f o r r e ading (read during c o n v er t mode) previous conversion t 1 t 3 t 12 t 13 t 4 bus y da t a bus 02966-0-014 cnvst, rd cs = 0 th e by tesw ap p i n al lo ws a g l ue les s in t e r f ace t o a n 8-b i t b u s. a s s h o w n i n , th e ls b b y t e is o u t p u t o n d[7:0] a n d th e ms b is o u t p u t o n d[15:8] wh en by tesw ap is l o w . w h en by tesw ap is hi gh, th e ls b a n d ms b b y t e s a r e swa p p e d a n d th e ls b is o u t p u t o n d[15:8] a n d th e ms b is o u t p u t o n d[7:0]. by co nn e c t i n g by tesw ap to a n addr ess lin e , t h e 16-b i t da t a ca n be r e ad in tw o b y t e s o n ei th er d[15:8] o r d[7:0]. f i gur e 3 1 f i g u r e 31. 8-bit p a r a llel inter f ac e cs rd byteswap pins d158 pins d70 hi-z hi-z hih byte lo w byte lo w byte hih byte hi-z hi-z t 12 t 12 t 13 02966-a-025 serial interface th e ad7653 is co nf igur ed t o us e th e s e r i al in t e r f ace wh en se r / pa r is h e ld hi gh. th e ad7653 o u t p u t s 16 b i ts o f da ta , ms b f i rst, o n t h e s d o u t p i n. this da t a is sy n c hr o n ize d wi t h t h e 16 clo c k p u ls es p r o v ide d o n t h e sclk p i n. th e o u t p u t da t a i s v a li d o n bo th th e ri si n g a n d falli n g ed g e s o f th e d a ta c l oc k . rev. a page 20 of 28
ad7653 u s ual l y , beca us e th e ad7653 is us ed wi th a fas t thr o ug h p u t , th e m a s t er re ad d u r i n g c o n v ersio n m o de is t h e m o s t r e co mm en de d s e r i a l m o de. i n t h is m o de, t h e s e r i a l clo c k a n d d a t a t o g g l e at ap p r o p r i at e i n s t a n t s , m i n i m i z i n g p o t e nt i a l f eed th r o ugh be t w ee n d i gi tal a c ti v i t y a n d cri t i c al co n v e r si o n de cisio n s. master serial interface internal c l ock th e ad7653 is co nf igur ed t o g e n e ra t e a n d p r o v ide th e s e r i al d a ta c l oc k sc l k wh e n th e e t / int p i n is h e ld l o w . th e ad7653 als o g e n e ra t e s a s y n c sig n al t o in dica t e t o th e h o s t w h en t h e s e r i al da t a is valid . th e s e r i al clo c k sclk a n d t h e s y n c sig n a l ca n b e in v e r t e d , if desir e d . d e p e n d in g o n t h e rd c/s d in in p u t, th e da ta ca n be r e ad a f t e r eac h co n v ersio n o r d u r i n g th e f o l l o w in g co n v ersio n . f a n d s h o w th e d e ta iled ti m i n g d i a g ra m s o f th e s e t w o m o d e s. i gur e 3 2 f i gur e 32. master s e rial d a ta t i mi ng for r e ading (r ead a f ter con v er t) f i gur e 3 3 f i gur e 33. master s e rial d a ta t i ming for read ing (r ead p r ev ious con v ersion during con v er t) i n r e a d a f te r c o n v e r s i on mo d e , it shou l d b e note d t h a t u n l i ke in o t h e r m o des, th e b u s y sig n al r e t u r n s l o w a f t e r th e 16 da ta b i ts a r e p u ls e d o u t a n d n o t a t t h e en d o f t h e co n v ersio n phas e , w h ich r e su l t s in a lo n g er b u s y wid t h. t 3 bu s y sync sclk sdout t 28 t 29 t 14 t 18 t 19 t 20 t 21 t 24 t 26 t 27 t 23 t 22 t 16 t 15 12 3 1 4 1 5 1 6 d15 d14 d2 d1 d0 x rdc/sdin = 0 invsclk = invsync = 0 t 25 t 30 02966-0-015 cnvst cs, rd ext/int = 0 ext/int = 0 rdc/sdin = 1 invsclk = invsync = 0 t 3 t 1 t 17 t 14 t 19 t 20 t 21 t 24 t 26 t 25 t 27 t 23 t 22 t 16 t 15 d15 d14 d2 d1 d0 x 12 3 1 4 1 5 1 6 t 18 bu s y sync sclk sdout 02966-0-016 cnvst cs, rd rev. a | page 21 of 28
ad7653 slave serial interface external c l ock th e ad is co nf igur ed t o accep t a n ext e r n al l y s u p p lied se ri al d a ta c l oc k o n th e sc l p i n wh e n th e e t / int pi n i s hel d h i h i n th i s m o d e sev e ral m e th od s ca n be used t o r e a d th e da t a th e ext e r n al s e r i al clo c k is ga t e d b y cs h e n cs and rd a r e bo th l o th e d a ta ca n be re a d af te r e a ch c o n v e r s i on or d u r i n g t h e fol l o w in g co n v ersio n th e ext e r n al clo c k ca n b e e i t h e r a c o n t i n u o u s or a d i s c on t i n u ou s cl o c k a d i s c on t i n u ou s c l o c k ca n be ei th er n o r m al l y hi h o r n o r m al l y l o wh en i n a c ti v e f a n d f s h o w th e d e ta iled ti m i n g dia g ra m s o f t h es e m e t h o d s i gur e f i g u r e slave s e rial d a t a timing f o r r e ading (r ead a f ter conver t ) i gur e f i g u r e slave s e rial d a t a timing f o r r e adin g (r ead p r ev ious con v ersion during con v er t) h ile th e ad is p e r f o r min g a b i t decisio n i t is im p o r t a n t t h a t vol t a g e t r a n sien ts b e a v o i de d o n dig i t a l in p u t/o u t p u t p i n s or d e g r a d a t i o n of t h e c o n v e r s i on re su lt c o u l d o c c u r t h i s i s p a r t ic u l a r l y im p o r t a n t d u r i n g t h e s e co n d half o f t h e co n v ersio n p h as e beca us e th e ad p r o v ides er r o r co r r ec tio n cir c ui tr y t h a t ca n co r r e c t fo r a n im p r o p er b i t de cisio n made d u r i n g t h e f i r s t h a l f of t h e c o n v e r s i on ph a s e f o r t h i s re a s on it i s re c o m - m e n d e d t h a t w h en a n ext e r n a l clo c k is b e in g p r o v ide d i t is a d i s c on t i n u ou s cl o c k t h a t i s to g g l i n g on ly w h e n b u s i s lo o r m o r e i m po r t a n tl y th a t i t d o e s n o t tra n si ti o n d u ri n g th e la t t e r half o f b u s hi h sclk sdout d15 d14 d1 d0 d13 x15 x14 x13 x1 x0 y15 y14 bu s y sdin invsclk = 0 t 35 t 36 t 37 t 31 t 32 t 16 t 33 x15 x 1 4 x 1 2 3 1 4 1 51 61 7 1 8 t 34 02966-0-017 ext/int = 1 rd rd = 0 s dout sclk d1 d0 x d15 d14 d13 12 3 1 4 1 5 1 6 t 3 t 35 t 36 t 37 t 31 t 32 t 16 bu s y ext/int = 1 invsclk = 0 02966-0-018 cnvst cs rd = 0 rev. a | page 22 of 28
ad7653 external discontinuous clock data read after conv ersion external c l ock data r e ad during c o nvers i on f i gur e s h o w s th e d e ta iled ti m i n g d i a g ra m s o f th i s m e th od d u r i n g a co n v ersio n w h i l e b o t h cs and rd a r e bo th l o th e r e s u l t o f th e p r evio us co n v ersio n ca n be r e ad th e da ta is s h if t e d o u t ms b f i r s t w i th 1 c l oc k p u lse s a n d i s v a li d o n bo th th e r i sin g a n d fal l in g e d g e s o f th e c l o c k th e 1 b i ts m u s t be r e ad b e fo r e t h e c u r r en t co n v ersio n is co m p let e o t h e r w is e rd err o r is p u ls ed hi h a n d ca n be us ed t o in t e r r u p t th e h o st in t e r f ace t o p r e v en t in co m p let e da t a r e adin g th er e is n o da isy - cha i n fe a t ur e in t h is m o de a n d t h e rd c/s d in in p u t s h o u ld al wa ys be tied ei th er hi h o r l o th o u g h t h e max i m u m t h r o ug h p u t ca nn o t b e achie v e d usin g t h is m o de i t is t h e m o s t r e co mm en de d o f t h e s e r i al s l a v e m o des s h o w s th e d e ta iled ti m i n g d i a g ra m s o f th i s m e th od a f te r a c o n v e r s i on i s c o m p l e te i n di c a te d b y b u s re t u r n i n g l o t h e co n v ersio n s r e s u l t ca n b e r e ad w h i l e b o t h cs and rd a r e lo d a t a is shif t e d o u t ms b f i rst wi t h 1 clo c k p u ls es a n d is valid o n t h e r i sin g a n d fal l in g e d ges o f t h e clo c k f i gur e a m o n g th e a d v a n t a g e s o f th i s m e th od i s th e fa ct th a t co n v e r si o n p e r f o r ma n c e is n o t deg r ade d b e ca us e t h er e a r e n o v o l t a g e t r a n sien ts o n t h e dig i t a l in t e r f ace d u r i n g t h e co n v ersio n p r o c es s a n o t h e r a d v a n t a g e i s th e a b ili t y t o r e a d th e d a ta a t a n y s p eed u p t o mh wh i c h a c co m m od a t e s bo th th e s l o w d i gi tal h o s t in t e r f ace a n d t h e fas t es t s e r i al r e adin g t o r e d u ce p e r f o r ma n c e deg r ada t io n d u e to dig i t a l ac t i vi ty a fast dis c o n t i n u o u s clo c k (a t le ast 1 mh w h en i m p u ls e m o de is us ed 2 mh wh en n o r m al m o de is us ed o r mh wh en a r p m o de is us e d ) is r e co mm en de d to en sur e t h a t a l l t h e b i ts a r e r e ad d u r i n g t h e f i rs t half o f t h e co n v ersio n phas e i t is als o p o ss ibl e to b e g i n to re a d da t a af te r c o n v e r s i on and c o n t i n u e to r e ad t h e las t b i ts a f t e r a n e w co n v ersio n has b e en ini t ia t e d this al lo ws t h e us e o f a s l o w er clo c k s p e e d li k e 1 mh in i m p u ls e mo d e 1 m h i n n o r m a l mo d e a n d 2 mh in a r p m o de f i nal l y in this m o de o n l y th e ad p r o v ides a da isy-c h a i n f e a t ur e usin g th e rd c/s d in p i n f o r cas c adin g m u l t i p le co n v er t e rs t o g e t h er this fe a t ur e is us ef u l fo r r e d u cin g co m p o- n e n t co un t a n d wir i n g co nn e c t i o n s w h en desir e d as fo r in st a n ce in is ola t e d m u l t ico n v e r t er a p plica t io n s th e co n c a t ena t io n o f tw o devices is s h o w n i n s i m u l t a n eo us s a m p lin g is p o s s i b le b y usin g a co mm o n cnv s t sig n al i t s h o u ld be n o t e d tha t th e rd c/s d in in p u t is la t c h e d on t h e e d ge of s c l opp o s i te t h e one u s e d to sh i f t out t h e d a t a o n s d o u t th us t h e ms b o f t h e u p s t r e a m co n v er t e r fol l o w s t h e ls b o f t h e do wn s t r e a m co n v er t e r o n t h e n e xt scl c y cle f i gur e f i g u r e 36. t w o a d 7653s in a d a is y- chain conf ig ur at ion sclk sdout rdc/sdin bu s y bu s y data out ad7653 1 (do wnstream) busy out sclk ad7653 2 (upstream) rdc/sdin sdout sclk in cnvst in 02966-0-019 cnvst cs cnvst cs cs in rev. a page 23 of 28
ad7653 microprocessor interfacing th e ad7653 is ideal l y s u i t ed f o r tradi t io nal dc m e as ur em en t a p pl i c a t i o ns supp or t i ng a m i c r opro c e ss or , and f o r a c s i g n a l p r o c essin g a p plica t io n s in t e r f acin g t o a dig i t a l sig n a l p r o c ess o r . th e ad7653 is desig n ed t o in t e r f ace ei th er wi th a p a ral l e l 8-b i t o r 16-b i t wide in t e r f ace , o r wi th a g e n e ral-p u r p os e s e r i al p o r t o r i / o p o r t s on a m i c r o c on t r o l l e r . a v a r i e t y of e x te r n a l bu f f e r s c a n be us ed wi th th e ad7653 t o p r ev en t dig i tal n o is e f r o m co u p lin g in t o t h e ad c. th e fol l o w in g s e c t io n dis c uss e s t h e us e o f a n ad7653 wi th a n ads p -219x s p i eq ui p p ed ds p . spi interface (adsp-219x) f i gur e 3 7 f i g u r e 37. inter f acing t h e a d 7653 to an spi inter f ac e s h o w s a n in t e r f ace dia g ra m betw een th e ad7653 a n d th e s p i eq ui p p ed ads p -219x. t o acco mm o d a t e th e s l o w er s p eed o f th e ds p , th e ad7653 ac ts as a s l a v e device a n d da ta m u s t be r e ad a f t e r co n v ersio n . this m o de als o al lo ws th e da isy- c h a i n f e a t ur e . th e co n v er t co mma n d ca n be ini t ia t e d in re sp ons e to an i n te r n a l t i me r i n te r r upt . the re a d i n g pro c e s s c a n b e ini t ia t e d in r e sp o n s e t o t h e en d-o f -co n v e rsio n sig n a l (b us y go in g lo w) usin g a n in t e r r u p t lin e o f t h e ds p . th e s e r i a l in t e r - face (s p i ) o n th e ads p -219x is co nf igur ed f o r mas t er m o de (ms t r) = 1, c l o c k p o la r i ty b i t (cpol) = 0, c l o c k phas e b i t (cp h a) = 1, a n d s p i i n t e r r u p t ena b le (tim o d ) = 00b y w r it i n g to t h e spi c o n t ro l re g i ste r ( s pic l t x ) . t o me e t a l l t i m i ng r e q u ir em en ts, t h e s p i clo c k s h o u ld b e limi t e d t o 17 mb ps, w h ich al lo ws i t t o r e ad a n ad c r e s u l t in les s tha n 1 s. w h en a hig h er s a m p lin g ra t e is desir e d , us e o f o n e o f t h e p a ral l e l in t e r f ace m o des is r e co mm en de d . ad7653* adsp-219x* ser/par pfx misox sckx pfx or tfsx bu s y sdout sclk cnvst ext/int cs rd invsclk dv d d * additional pins omitted for clarity spixsel (pfx) 02966-0-021 rev. a | page 24 of 28
ad7653 application hints bipolar and wider input ranges i n s o m e a p plica t io n s , i t is desira b l e t o us e a b i p o la r o r wider a n alog in p u t ra n g e s u c h as 10 v , 5 v , o r 0 v t o 5 v . al th o u g h th e ad7653 has o n l y o n e uni p ola r ra n g e , sim p le m o dif i ca tio n s o f in p u t dr i v er cir c ui t r y a l lo w b i p o la r a n d wider in p u t r a n g es to b e u s e d w i t h out an y p e r f or m a nc e d e g r a d a t i o n . show s a co n n ecti o n d i a g ra m th a t allo w s th i s . c o m p o n e n t v a l u e s r e q u ir e d a n d r e su l t in g f u l l -s ca le ra n g es a r e sh o w n i n . f i g u re 3 8 f i gur e 3 8 f i g u r e 38. u s ing t h e a d 7653 in 16-bit bipolar and/or w i der input rang es t a b l e 8 ta ble 8. component va lues a nd input ra nges w h en desir e d , acc u ra t e ga in a n d o f fs et ca n be cali b r a t ed b y a c qu i r i n g a g r ou nd and volt age re fe re nc e u s i n g an an a l o g m u l t i p lexer (u2) as s h o w n i n . u1 analog input r2 r3 r4 100nf r1 u2 c ref in ingnd ref refgnd ad7653 02966-0-022 c f 15 ? input range r1 (?) r2 (k?) r3 (k?) r4 (k?) 10 v 500 4 2.5 2 5 v 500 2 2.5 1.67 0 v to C5 v 500 1 none 0 layout th e ad7653 has v e r y g o o d imm u ni ty t o n o is e o n th e p o w e r su p p l i e s . h o we ve r , c a re shou l d st i l l b e t a k e n wi t h re g a rd to gr o u n d i n g l a y o u t . th e p r in t e d cir c ui t bo a r d tha t h o us es th e ad7653 s h o u ld be desig n e d s o t h a t t h e a n a l o g a n d dig i t a l s e c t io n s a r e s e p a r a te d and c o n f i n e d to c e r t ai n are a s of t h e b o ard. t h i s f a c i l i t a te s t h e us e o f g r o u n d pla n es t h a t ca n b e s e p a r a te d e a si ly . dig i t a l a n d an a l o g g r ou nd pl ane s shou l d b e j o i n e d i n on ly one pl a c e, p r ef era b l y un der n ea th th e ad7653, o r as c l os e as p o s s i b le t o th e ad7653. i f th e ad7653 is in a sys t em wh er e m u l t i p le devices r e q u i r e a n alog- t o- d i gi tal gr o u n d co n n ecti o n s, th e co n n ecti o n shou l d st i l l b e made a t one p o in t on ly , a st ar g r ou nd p o in t t h a t s h o u ld be es ta b l is h e d as c l os e as p o s s i b le t o th e ad7653. r u nnin g dig i t a l lin e s un der t h e de vice sh o u ld b e a v o i de d sin c e t h es e wi l l co u p le n o is e o n t o t h e die . th e a n alog g r o u n d pla n e s h o u ld be al lo w e d t o r u n un der th e ad7653 t o a v o i d n o is e co u p lin g . f a s t swi t c h in g sig n als lik e cnv s t or cl o c k s shou l d b e shielde d wi t h dig i t a l g r o u n d to a v o i d r a dia t in g n o is e to o t h e r s e c t i o ns of t h e b o ard, and shou l d ne ve r r u n ne ar an a l o g s i g n a l p a th s. cr os s o v e r o f dig i tal a n d a n alog sig n als s h o u ld be a v o i de d . t r aces o n dif f er en t b u t clos e la yers o f t h e b o a r d s h o u ld r u n a t r i g h t a n g l es t o eac h o t h e r t o wil l r e d u ce th e ef f e c t o f cr os s t al k th r o ugh th e boa r d . th e p o w e r s u p p l y lin e s t o th e ad7653 s h o u ld us e as la rg e a t r ace as p o s s i b le t o p r o v ide lo w im p e da n c e p a t h s a n d t o r e d u ce t h e ef fe c t o f g l i t ch es o n t h e p o w e r s u p p l y lin e s. g o o d de co u p lin g is a l s o im p o r t a n t t o lo w e r t h e su p p ly s im p e da n c e p r es en t e d t o th e ad7653, a n d t o r e d u ce th e ma g n i t ude o f th e s u p p l y s p ik es. deco u p lin g cera mic ca p a ci t o rs, typ i cal l y 100 nf , shou l d b e pl ac e d on e a ch p o we r su p p ly p i n a v dd , d v dd , and o v dd c l o s e to , and i d e a l l y r i g h t up ag ai nst t h e s e pi ns and t h e i r c o r r e s p o nd i n g g r ou nd pi ns . a d d i t i on a l ly , l o w e s r 10 f ca p a ci t o rs s h o u ld be lo ca t e d n e a r th e ad c t o f u r t h e r r e d u ce lo w f r e q uen c y r i p p le . th e d v d d s u p p l y o f th e ad7653 ca n be a s e p a ra t e s u p p l y o r ca n co m e f r o m th e a n alog s u p p l y a v d d o r th e d i gi tal i n t e rfa c e su p p ly o v dd . w h e n t h e s y ste m dig i t a l su p p ly is nois y or w h e n fas t swi t c h in g dig i tal sig n als a r e p r es en t, if n o s e p a ra t e s u p p l y is a v a i la b l e , th e us er s h o u ld co nn ec t d v d d t o a v d d thr o ug h a n r c f i l t er (s e e f ) , a n d t h e sys t em s u p p l y t o o v d d a n d th e r e m a i n i n g d i gi tal ci r c ui tr y . w h e n d v d d i s po w e r e d f r o m th e sys t em s u p p l y , i t is us ef u l t o in s e r t a bead t o f u r t h e r r e d u ce hig h f r e q uen c y sp i k es. i gur e 2 2 th e ad7653 has f i v e dif f er en t g r o u n d p i n s : in gnd , refgnd , a g nd , d g nd , a n d o g nd . in gnd is us e d to s e n s e t h e a n a l o g in p u t sig n al . refgnd s e n s es t h e r e fer e n c e v o l t a g e a n d , b e ca us e i t ca r r i es p u ls e d c u r r en ts, s h o u ld be a lo w im p e da n c e r e t u r n t o t h e r e fer e n c e . a g nd is t h e g r o u n d t o w h ich m o st in t e r n a l ad c a n alog si gn als a r e r e f e r e n c ed ; i t m u s t be co n n ect e d w i th th e l e a s t re s i st anc e to t h e an a l o g g r ou nd pl ane. d g n d m u st b e t i e d to t h e an a l o g or d i g i t a l g r ou nd pl ane d e p e nd i n g on t h e c o n f i g - ur a t io n. o g nd is co nn e c te d to t h e dig i t a l sy stem g r o u n d . evaluating the ad7653s performance a r e co mm en ded la yo u t f o r th e ad7653 is o u tlin ed in th e e v al -ad7653 eval ua tio n bo a r d f o r th e ad7653. th e e v a l u a t i on b o ard p a ck age i n clu d e s a f u l l y a s s e m b l e d and te ste d e v a l ua t i o n b o a r d , do c u m e n t a t io n, a n d s o f t wa r e fo r co n t r o l l in g t h e b o a r d f r o m a pc via t h e ev a l -c ontrol br d 2 . rev. a | page 25 of 28
ad7653 rev. a | page 26 of 28 outline dimensions top view (pins down) 1 12 13 25 24 36 37 48 0.27 0.22 0.17 0.50 bsc 7.00 bsc sq seating plane 1.60 max 0.75 0.60 0.45 view a 9.00 bsc sq pin 1 0.20 0.09 1.45 1.40 1.35 0.08 max coplanarity view a rotated 90 ccw seating plane 10 6 2 7 3.5 0 0.15 0.05 compliant to jedec standards ms-026bbc figure 39. 48-lead quad flatpack (lqfp)(st-48) dimensions shown in millimeters pin 1 indicator top view 6.75 bsc sq 7.00 bsc sq 1 48 12 13 37 36 24 25 bottom view 5.25 5.10 sq 4.95 0.50 0.40 0.30 0.30 0.23 0.18 0.50 bsc 12 max 0.80 max 0.65 typ 1.00 0.85 0.80 5.50 ref 0.05 max 0.02 nom 0.60 max 0.60 max pin 1 indicator coplanarity 0.08 seating plane paddle connected to agnd. this connection is not required to meet the electrical performances 0.25 min 0.20 ref compliant to jedec standards mo-220-vkkd-2 figure 40. 48-lead frame chip scale package (lfcsp) (cp-48) dimensions shown in millimeters ordering guide model temperature range package description package option ad7653ast C40c to +85c quad flatpack (lqfp) st-48 ad7653astrl C40c to +85c qu ad flatpack (lqfp) st-48 AD7653ACP C40c to +85c lead frame chip scale (lfcsp) cp-48 AD7653ACPrl C40c to +85c lead frame chip scale (lfcsp) cp-48 eval-ad7653cb 1 evaluation board eval-control brd2 2 controller board 1 this board can be used as a standalone evaluation board or in conjunction with the eval-control brd2 for evaluation/demonstrati on purposes. 2 this board allows a pc to control and communicate with all analog devices evaluation boards ending in the cb designators.
ad7653 notes rev. a | page 27 of 28
ad7653 notes ? 2003 analog devices, inc. all ri ghts reserved. trademarks and registered trademarks are the prop erty of their respective owners. c02966C0C9/03(a) rev. a | page 28 of 28

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